CMSIS Reference Macro Definition Documentation

 

RSL15_SYS_VER_MAJOR

#define RSL15_SYS_VER_MAJOR 0x01

 

RSL15 header file major version.

 

Location: rsl15.h:44

 

RSL15_SYS_VER_MINOR

#define RSL15_SYS_VER_MINOR 0x00

 

RSL15 header file minor version.

 

Location: rsl15.h:47

 

RSL15_SYS_VER_REVISION

#define RSL15_SYS_VER_REVISION 0x01

 

RSL15 header file revision version.

 

Location: rsl15.h:50

 

RSL15_SYS_VER

#define RSL15_SYS_VER ((RSL15_SYS_VER_MAJOR << 12) | \ (RSL15_SYS_VER_MINOR << 8) | \ (RSL15_SYS_VER_REVISION))

 

RSL15 firmware version.

 

Location: rsl15.h:53

 

__ARMv8MML_REV

#define __ARMv8MML_REV 0x0000U

 

Arm v8 architecture revision.

 

Location: rsl15.h:100

 

__CM33_REV

#define __CM33_REV 0x0000U

 

Core revision r0p4.

 

Location: rsl15.h:101

 

__FPU_PRESENT

#define __FPU_PRESENT 1U

 

FPU present.

 

Location: rsl15.h:102

 

__DSP_PRESENT

#define __DSP_PRESENT 1U

 

DSP extension present.

 

Location: rsl15.h:103

 

__SAUREGION_PRESENT

#define __SAUREGION_PRESENT 1U

 

SAU regions present.

 

Location: rsl15.h:104

 

__MPU_PRESENT

#define __MPU_PRESENT 1U

 

MPU present.

 

Location: rsl15.h:105

 

__VTOR_PRESENT

#define __VTOR_PRESENT 1U

 

VTOR present.

 

Location: rsl15.h:106

 

__NVIC_PRIO_BITS

#define __NVIC_PRIO_BITS 3U

 

3 bits used for interrupt priority levels

 

Location: rsl15.h:107

 

__Vendor_SysTickConfig

#define __Vendor_SysTickConfig 0U

 

Standard SysTick configuration is used.

 

Location: rsl15.h:108

 

I2C_REF_VALID

#define I2C_REF_VALID (((uint32_t)(ref) == (uint32_t)I2C) | \ ((uint32_t)(ref) == (uint32_t)I2C0) | \ ((uint32_t)(ref) == (uint32_t)I2C1))

 

Validation of I2C register block pointer reference for assert statements.

 

Location: rsl15.h:165

 

LIN_REF_VALID

#define LIN_REF_VALID (((uint32_t)(ref) == (uint32_t)LIN) | \ ((uint32_t)(ref) == (uint32_t)LIN0))

 

Validation of LIN register block pointer reference for assert statements.

 

Location: rsl15.h:170

 

PCM_REF_VALID

#define PCM_REF_VALID (((uint32_t)(ref) == (uint32_t)PCM) | \ ((uint32_t)(ref) == (uint32_t)PCM0))

 

Validation of PCM register block pointer reference for assert statements.

 

Location: rsl15.h:174

 

PWM_REF_VALID

#define PWM_REF_VALID (((uint32_t)(ref) == (uint32_t)PWM) | \ ((uint32_t)(ref) == (uint32_t)PWM0))

 

Validation of PWM register block pointer reference for assert statements.

 

Location: rsl15.h:178

 

SPI_REF_VALID

#define SPI_REF_VALID (((uint32_t)(ref) == (uint32_t)SPI) | \ ((uint32_t)(ref) == (uint32_t)SPI0) | \ ((uint32_t)(ref) == (uint32_t)SPI1))

 

Validation of SPI register block pointer reference for assert statements.

 

Location: rsl15.h:182

 

UART_REF_VALID

#define UART_REF_VALID (((uint32_t)(ref) == (uint32_t)UART) | \ ((uint32_t)(ref) == (uint32_t)UART0))

 

Validation of UART register block pointer reference for assert statements.

 

Location: rsl15.h:187

 

TIMER_REF_VALID

#define TIMER_REF_VALID (((uint32_t)(ref) == (uint32_t)TIMER) | \ ((uint32_t)(ref) == (uint32_t)TIMER0) | \ ((uint32_t)(ref) == (uint32_t)TIMER1) | \ ((uint32_t)(ref) == (uint32_t)TIMER2) | \ ((uint32_t)(ref) == (uint32_t)TIMER3))

 

Validation of TIMER register block pointer reference for assert statements.

 

Location: rsl15.h:191

 

DMA_REF_VALID

#define DMA_REF_VALID (((uint32_t)(ref) == (uint32_t)DMA) | \ ((uint32_t)(ref) == (uint32_t)DMA0) | \ ((uint32_t)(ref) == (uint32_t)DMA1) | \ ((uint32_t)(ref) == (uint32_t)DMA2) | \ ((uint32_t)(ref) == (uint32_t)DMA3))

 

Validation of DMA register block pointer reference for assert statements.

 

Location: rsl15.h:198

 

FLASH_REF_VALID

#define FLASH_REF_VALID (((uint32_t)(ref) == (uint32_t)FLASH) | \ ((uint32_t)(ref) == (uint32_t)FLASH0))

 

Validation of FLASH register block pointer reference for assert statements.

 

Location: rsl15.h:205

 

GPIO_PAD_COUNT

#define GPIO_PAD_COUNT 16

 

GPIO peripheral definitions.

 

Maximum number of GPIO pads

 

Location: rsl15.h:218

 

GPIO_GROUP_LOW_PAD_RANGE

#define GPIO_GROUP_LOW_PAD_RANGE 16

 

Number of GPIO pads in the lowest group (all)

 

Location: rsl15.h:219

 

GPIO_EVENT_CHANNEL_COUNT

#define GPIO_EVENT_CHANNEL_COUNT 4

 

Number of available GPIO interrupts.

 

Location: rsl15.h:220

 

GPIO0

#define GPIO0 0

 

GPIO pads definitions

 

GPIO 0

 

Location: rsl15.h:223

 

GPIO1

#define GPIO1 1

 

GPIO 1.

 

Location: rsl15.h:224

 

GPIO2

#define GPIO2 2

 

GPIO 2.

 

Location: rsl15.h:225

 

GPIO3

#define GPIO3 3

 

GPIO 3.

 

Location: rsl15.h:226

 

GPIO4

#define GPIO4 4

 

GPIO 4.

 

Location: rsl15.h:227

 

GPIO5

#define GPIO5 5

 

GPIO 5.

 

Location: rsl15.h:228

 

GPIO6

#define GPIO6 6

 

GPIO 6.

 

Location: rsl15.h:229

 

GPIO7

#define GPIO7 7

 

GPIO 7.

 

Location: rsl15.h:230

 

GPIO8

#define GPIO8 8

 

GPIO 8.

 

Location: rsl15.h:231

 

GPIO9

#define GPIO9 9

 

GPIO 9.

 

Location: rsl15.h:232

 

GPIO10

#define GPIO10 10

 

GPIO 10.

 

Location: rsl15.h:233

 

GPIO11

#define GPIO11 11

 

GPIO 11.

 

Location: rsl15.h:234

 

GPIO12

#define GPIO12 12

 

GPIO 12.

 

Location: rsl15.h:235

 

GPIO13

#define GPIO13 13

 

GPIO 13.

 

Location: rsl15.h:236

 

GPIO14

#define GPIO14 14

 

GPIO 14.

 

Location: rsl15.h:237

 

GPIO15

#define GPIO15 15

 

GPIO 15.

 

Location: rsl15.h:238

 

SYS_DUMMY_READ

#define SYS_DUMMY_READ SYSCTRL->PROD_STATUS

 

Register that always reads back as 0x00000000.

 

Location: rsl15.h:251

 

SYS_DUMMY_WRITE

#define SYS_DUMMY_WRITE SYSCTRL->CC_DCU_EN0

 

Register to which writes are ineffective.

 

Location: rsl15.h:254

 

ERRNO_NO_ERROR

#define ERRNO_NO_ERROR 0x0000

 

No error.

 

Location: rsl15.h:312

 

ERRNO_GENERAL_FAILURE

#define ERRNO_GENERAL_FAILURE 0x0001

 

General error.

 

Location: rsl15.h:315

 

DEFAULT_FREQ

#define DEFAULT_FREQ 5000000

 

High speed main RC oscillator default frequency set by boot ROM application Default value is 3 MHz uncalibrated.

 

Assuming a worse case of 5 MHz

 

Location: system_rsl15.h:56

 

STANDBYCLK_DEFAULT_FREQ

#define STANDBYCLK_DEFAULT_FREQ 32768

 

Low speed standby RC oscillator default frequency.

 

Location: system_rsl15.h:59

 

RFCLK_BASE_FREQ

#define RFCLK_BASE_FREQ 48000000

 

Frequency of the 48 MHz crystal used for the RF front-end.

 

Location: system_rsl15.h:62

 

EXTCLK_MAX_FREQ

#define EXTCLK_MAX_FREQ 48000000

 

Maximum frequency supported by using an external clock.

 

Location: system_rsl15.h:65

 

SWCLK_MAX_FREQ

#define SWCLK_MAX_FREQ 48000000

 

Maximum frequency supported by the SWJ-DP interface.

 

Location: system_rsl15.h:68

 

RCOSC_MAX_FREQ

#define RCOSC_MAX_FREQ 12000000

 

Maximum frequency supported by the internal RC oscillator.

 

Location: system_rsl15.h:71