ASCC_CTRL

Bit Field

Read/Write

Field Name

Description

8

W

PHASE_CNT_START_NO_WAIT

Start the asynchronous clock phase counter mechanism without waiting on a sync pulse

7

R

PERIOD_CNT_STATUS

Asynchronous clock period counter status

6

W

PERIOD_CNT_STOP

Stop the asynchronous clock period counter mechanism

5

W

PERIOD_CNT_START

Start the asynchronous clock period counter mechanism

4

R

PHASE_CNT_MISSED_STATUS

Asynchronous clock phase counter missed status

3

R

PHASE_CNT_STATUS

Asynchronous clock phase counter status

2

W

PHASE_CNT_STOP

Stop the asynchronous clock phase counter mechanism

1

W

PHASE_CNT_START

Start the asynchronous clock phase counter mechanism and wait for sync pulse

0

W

CNT_RESET

Reset asynchronous clock counter

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

8

PHASE_CNT_START_NO_WAIT

PHASE_CNT_START_NO_WAIT

Reset PHASE_CNT and start the asynchronous clock phase counter mechanism without waiting on a sync pulse

0x1

7

PERIOD_CNT_STATUS

PERIOD_CNT_IDLE

The asynchronous clock period counter mechanism is idle

0x0*

PERIOD_CNT_BUSY

The asynchronous clock period counter mechanism is busy

0x1

6

PERIOD_CNT_STOP

PERIOD_CNT_STOP

Stop the asynchronous clock period counter mechanism

0x1

5

PERIOD_CNT_START

PERIOD_CNT_START

Reset PERIOD_CNT and start the asynchronous clock period counter mechanism

0x1

4

PHASE_CNT_MISSED_STATUS

PHASE_CNT_NORMAL

The asynchronous clock phase counter mechanism was not stopped due to a missed synchronization signal

0x0*

PHASE_CNT_MISSED

The asynchronous clock phase counter mechanism was stopped due to a missed synchronization signal

0x1

3

PHASE_CNT_STATUS

PHASE_CNT_IDLE

The asynchronous clock phase counter mechanism is idle

0x0*

PHASE_CNT_BUSY

The asynchronous clock phase counter mechanism is busy

0x1

2

PHASE_CNT_STOP

PHASE_CNT_STOP

Stop the asynchronous clock phase counter mechanism

0x1

1

PHASE_CNT_START

PHASE_CNT_START

Reset PHASE_CNT and start the asynchronous clock phase counter mechanism and wait on a sync pulse

0x1

0

CNT_RESET

CNT_RESET

Reset asynchronous clock counter

0x1