SYSCTRL_CC_DCU_LOCK0
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
31 |
R |
CC_DCU_LOCK_ICV_GP |
Always On dcu_en0 general purpose bits lock. All bits must be locked to assure that the state is locked |
30:28 |
R |
CC_DCU_LOCK_ICV_EH |
Always On energy harvesting signature lock. All bits must be locked to assure that the state is locked |
27:25 |
R |
CC_DCU_LOCK_ICV_PRDSTATE |
Always On production state identifier lock. All bits must be locked to assure that the state is locked |
24:22 |
R |
CC_DCU_LOCK_ICV_TCTRL_ACC |
Always On test control configuration access control lock. All bits must be locked to assure that the state is locked |
21:19 |
R |
CC_DCU_LOCK_ICV_TRIM_ACC |
Always On MNVR and chip trim access control lock. All bits must be locked to assure that the state is locked |
18:16 |
R |
CC_DCU_LOCK_ICV_NVM_ACC |
Always On NVM access control lock. All bits must be locked to assure that the state is locked |
15:13 |
R |
CC_DCU_LOCK_ICV_SEC_RST |
Always On ICV secure reset enable lock. All bits must be locked to assure that the state is locked |
12:10 |
R |
CC_DCU_LOCK_ICV_SPINDEN |
Always On ICV CM33 secure non-intrusive debug enable control lock. All bits must be locked to assure that the state is locked |
9:7 |
R |
CC_DCU_LOCK_ICV_SPIDEN |
Always On ICV CM33 secure intrusive debug enable control lock. All bits must be locked to assure that the state is locked |
6:4 |
R |
CC_DCU_LOCK_ICV_NIDEN |
Always On ICV CM33 non-intrusive debug enable control lock. All bits must be locked to assure that the state is locked |
3:1 |
R |
CC_DCU_LOCK_ICV_DBGEN |
Always On ICV CM33 debug enable control lock. All bits must be locked to assure that the state is locked |
0 |
R |
CC_DCU_LOCK_ICV_SEC_RST_MASK |
Always On ICV secure reset mask lock |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
0 |
CC_DCU_LOCK_ICV_SEC_RST_MASK |
CC_SECURE_RST_MASK_UNLOCKED |
The FW does not lock the secure debug reset mask bit |
0x0* |
|
|
CC_SECURE_RST_MASK_LOCKED |
The FW locks the secure debug reset mask bit |
0x1 |