Clock Generation Registers

Register Name

Register Description

Address

CLK_SYS_CFG

System Clock Configuration Register

0x40000100

CLK_DIV_CFG0

Prescale register for SLOWCLK, BBCLK and UARTCLK clocks

0x40000104

CLK_DIV_CFG1

Prescale register for charge pump clock and sensor clock

0x40000108

CLK_DIV_CFG2

Prescale register for User clock

0x4000010C