ACS_VDDPA_CTRL

Bit Field

Read/Write

Field Name

Description

19:16

RW

INITIAL_VTRIM

Initial output voltage trimming configuration in 10 mV steps

12

RW

VDDPA_SW_CTRL

Power amplifier supply control

9

RW

ENABLE_ISENSE

Enable current sensing circuit

8

RW

ENABLE

Enable control

5:0

RW

VTRIM

Output voltage trimming configuration in 10 mV steps

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

19:16

INITIAL_VTRIM

VDDPA_INITIAL_TRIM_1P05V

1.05 V

0x0*

VDDPA_INITIAL_TRIM_1P10V

1.10 V

0x5

VDDPA_INITIAL_TRIM_1P20V

1.20 V

0xF

12

VDDPA_SW_CTRL

VDDPA_SW_HIZ

Set the output HIZ (floating) in disable mode

0x0*

VDDPA_SW_VDDRF

Connect switched output to VDDRF regulator (ENABLE bit must be reset)

0x1

9

ENABLE_ISENSE

VDDPA_ISENSE_DISABLE

Disable the VDDPA regulator current sensing circuit

0x0*

VDDPA_ISENSE_ENABLE

Enable the VDDPA regulator current sensing circuit

0x1

8

ENABLE

VDDPA_DISABLE

Disable the VDDPA regulator

0x0*

VDDPA_ENABLE

Enable the VDDPA regulator

0x1

5:0

VTRIM

VDDPA_TRIM_1P05V

1.05 V

0x0

VDDPA_TRIM_1P06V

1.06 V

0x1

VDDPA_TRIM_1P59V

1.59 V

0x36

VDDPA_TRIM_1P60V

1.60 V

0x37*

VDDPA_TRIM_1P61V

1.61 V

0x38

VDDPA_TRIM_1P68V

1.68 V

0x3F