SENSOR_SAR_CTRL
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
14 |
W |
START_SINGLE |
Start single conversion command |
13 |
RW |
START_CONTINUOUS |
Start continuous conversions command |
12 |
R |
BUSY |
Conversion in progess flag |
9:8 |
RW |
MODE |
Conversion mode selection |
6:4 |
RW |
NUM_SAMPLE |
Defines the number of clk cycles for data sampling |
3:0 |
RW |
OUT_SEL |
Output selection (undefined values return 0) |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
14 |
START_SINGLE |
SAR_START_SINGLE |
Start single conversion |
0x1 |
13 |
START_CONTINUOUS |
SAR_START_CONTINUOUS |
Start continuous conversions |
0x1 |
|
|
SAR_STOP_CONTINUOUS |
Stop continuous conversions |
0x0* |
12 |
BUSY |
SAR_IDLE |
Idle or conversion done |
0x0* |
|
|
SAR_BUSY |
Conversion in progress |
0x1 |
9:8 |
MODE |
SAR_CONV_12BIT |
Convert 12 bits |
0x0* |
|
|
SAR_CONV_14BIT |
Convert 14 bits |
0x1 |
|
|
SAR_CAL_WEIGHT |
Gain compensation (calibration) |
0x2 |
|
|
SAR_AUTO_ZERO |
Offset compensation (calibration) |
0x3 |
6:4 |
NUM_SAMPLE |
SAR_NSAMPLING_CYCLE_1 |
1 cycle |
0x0* |
|
|
SAR_NSAMPLING_CYCLE_2 |
2 cycles |
0x1 |
|
|
SAR_NSAMPLING_CYCLE_3 |
3 cycles |
0x2 |
|
|
SAR_NSAMPLING_CYCLE_4 |
4 cycles |
0x3 |
|
|
SAR_NSAMPLING_CYCLE_5 |
5 cycles |
0x4 |
|
|
SAR_NSAMPLING_CYCLE_6 |
6 cycles |
0x5 |
|
|
SAR_NSAMPLING_CYCLE_7 |
7 cycles |
0x6 |
|
|
SAR_NSAMPLING_CYCLE_8 |
8 cycles |
0x7 |
3:0 |
OUT_SEL |
SAR_SEL_GATED_SIGNED_COMPENSATED |
Gated 2's complement offset compensated output |
0x0* |
|
|
SAR_SEL_GATED_SIGNED |
Gated 2's complement output |
0x1 |
|
|
SAR_SEL_GATED_UNSIGNED_COMPENSATED |
Gated unsigned offset compensated output |
0x2 |
|
|
SAR_SEL_GATED_UNSIGNED |
Gated unsigned output |
0x3 |
|
|
SAR_SEL_ACCUMULATOR |
Accumulator output (test purposes) |
0x4 |
|
|
SAR_SEL_DAC |
DAC signal (to analog) selection (test purposes) |
0x5 |
|
|
SAR_SEL_COMP_CNT |
Comparator output (from analog) and counters selection (test purposes) |
0x6 |
|
|
SAR_SEL_OFFSET |
Select offset compensation register (calibration) |
0x8 |
|
|
SAR_SEL_WEIGHT_BIT9 |
Select bit 9 weight gain compensation register (calibration) |
0x9 |
|
|
SAR_SEL_WEIGHT_BIT10 |
Select bit 10 weight gain compensation register (calibration) |
0xA |
|
|
SAR_SEL_WEIGHT_BIT11 |
Select bit 11 weight gain compensation register (calibration) |
0xB |
|
|
SAR_SEL_WEIGHT_BIT12 |
Select bit 12 weight gain compensation register (calibration) |
0xC |
|
|
SAR_SEL_WEIGHT_BIT13 |
Select bit 13 weight gain compensation register (calibration) |
0xD |
|
|
SAR_SEL_WEIGHT_BIT14 |
Select bit 14 weight gain compensation register (calibration) |
0xE |