DEBUG_DHCSR
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
31:16 |
W |
DBGKEY |
Debug key must be written to this field in order to write the rest of the register |
26 |
R |
S_RESART_S |
Restart sticky status |
25 |
R |
S_RESET_ST |
Core has been reset or is being rest. Bit is cleared on read. |
24 |
R |
S_RETIRE_ST |
Retire sticky status |
20 |
R |
S_SDE |
Secure debug enable. Indicates whether Secure invasive debug is allowed |
19 |
R |
S_LOCKUP |
Indicates if core is in lockup state |
18 |
R |
S_SLEEP |
Indicates if core is in sleep mode |
17 |
R |
S_HALT |
Indicates is core is halted |
16 |
R |
S_REGRDY |
Indicates register read/write operation is completed |
5 |
RW |
C_SNAPSTALL |
Set to break a stalled memory access |
3 |
RW |
C_MASKINTS |
Mask interrupts while stepping |
2 |
RW |
C_STEP |
Single step the processor |
1 |
RW |
C_HALT |
Halt the processor |
0 |
RW |
C_DEBUGEN |
Enable halt mode debugging |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
31:16 |
DBGKEY |
DEBUG_HALT_KEY |
Key to unlock DEBUG_DHCSR register |
0xA05F |