Register and Register Bit-Field Definitions

Using the hardware definition files allows you to refer to system components by C structures, assembly code, and preprocessor symbols instead of by addresses and bit fields. This greatly improves the readability, reliability and maintainability of your application code. The use of hardware definitions in an application also means that some hardware changes, such as changes to addresses or bit field values, are transparent to your application code.

Hardware register descriptions for the Arm Cortex-M33 processor's private peripherals are provided by the CMSIS package from Arm. Hardware register descriptions for all other components, and bit settings that are appropriate for use with the hardware register descriptions for the private peripherals, are available in the following files:

rsl15_hw.h: This generic include file selects the desired underlying header file appropriate to your hardware by using the RSL15_CID definition.
rsl15_hw_cid*.h: This include file is the header file that is appropriate for all devices that are compatible with the defined RSL15_CID (i.e., devices sharing the same chip version and major revision).
rsl15_hw_flat_cid*.h: An unstructured version of the rsl15_hw_cid*.h header file, which includes all of the same definitions but no structure typedefs (useful for application elements written in assembly).

NOTE: For applications that are intended to operate in non-secure application modes, the rsl15_hw_cid*_ns.h headers are used, as long as NON_SECURE is defined by the preprocessor.

Hardware descriptions in the register include files provide definitions supporting the SoC components using the defines and C objects listed in the "Hardware Register Components" table.

Table: Hardware Register Components

Item

Example

Description

Component Register Structure

GPIO_Type

Provides a list of all registers that support a specified component, and the read/write types for those registers

Component Register Instance

GPIO

Links the component register structure to the underlying hardware or sets of hardware

Bit-Field Positions

GPIO_CFG_DRIVE_Pos

Defines the base position for any bit-field within a register

Bit-Field Mask

GPIO_CFG_DRIVE_Mask

Defines a bit mask for any bit-field of more than one bit within a register

Register Structure

GPIO_CFG_Type

Provides a list of all sub-registers and alias structures

  • Sub-registers are defined byte (8-bit) or short (16-bit) access interfaces to part of a register that includes all elements belonging to the same configuration area.
  • Aliases are Arm Cortex-M33 processor bitband aliases that provide bit access to individual single-bit bit-fields where the underlying hardware supports this single-bit access.

Register Instance

GPIO_CFG

Links the register structure to the underlying hardware or sets of hardware for sub-registers

Bit-Setting

GPIO_MODE_GPIO_IN_0

Defines providing human-readable equivalents to settings that can be applied to a register bit-field to obtain the desired behavior

Bit-Field Sub-Register Positions

GPIO_CFG_IO_MODE_BYTE_Pos

Defines the base position for any bit-field within a register’s sub-register

Bit-Field Sub-Register Mask

GPIO_CFG_IO_MODE_BYTE_Mask

Defines a bit mask for any bit-field of more than one bit within a register’s sub-register

Sub-Register Bit-Setting

GPIO_MODE_GPIO_IN_0_BYTE

Defines providing human-readable equivalents to settings that can be applied to a register’s sub-register bit-field to obtain the desired behavior