SPI Macro Definition Documentation
SPI_CONFIG_MASK
#define SPI_CONFIG_MASK ((1 << SPI_CFG_TX_DMA_ENABLE_Pos) | \ (1 << SPI_CFG_RX_DMA_ENABLE_Pos) | \ (1 << SPI_CFG_TX_END_INT_ENABLE_Pos) | \ (1 << SPI_CFG_TX_START_INT_ENABLE_Pos) | \ (1 << SPI_CFG_RX_INT_ENABLE_Pos) | \ (1 << SPI_CFG_CS_RISE_INT_ENABLE_Pos) | \ (1 << SPI_CFG_OVERRUN_INT_ENABLE_Pos) | \ (1 << SPI_CFG_UNDERRUN_INT_ENABLE_Pos) | \ (1 << SPI_CFG_MODE_Pos) | \ SPI_CFG_MODE_Mask | \ (1 << SPI_CFG_WORD_SIZE_Pos) | \ SPI_CFG_WORD_SIZE_Mask | \ (1 << SPI_CFG_PRESCALE_Pos) | \ SPI_CFG_PRESCALE_Mask | \ (1 << SPI_CFG_CLK_POLARITY_Pos) | \ (1 << SPI_CFG_SLAVE_Pos))
Location: spi.h:61
SPI_PADS_NUM
#define SPI_PADS_NUM 6
Location: spi.h:81
IS_GPIO_REAL
#define IS_GPIO_REAL (gpio_number < GPIO_PAD_COUNT)
Location: spi.h:88
SYS_SPI_CONFIG
#define SYS_SPI_CONFIG Sys_SPI_Config(SPI, (config))
Location: spi.h:341
Parameters
Direction | Name | Description |
---|---|---|
in |
config |
Interface operation configuration; use SPI_SELECT_[MASTER | SLAVE], SPI_CLK_POLARITY_[NORMAL | INVERSE], SPI_PRESCALE_*, SPI_WORD_SIZE_*, SPI_MODE_[SPI | DSPI | QSPI] SPI_UNDERRUN_INT_[ENABLE | DISABLE], SPI_OVERRRUN_INT_[ENABLE | DISABLE], SPI_CS_RISE_INT_[ENABLE | DISABLE], SPI_RX_INT_[ENABLE | DISABLE] SPI_TX_INT_[ENABLE | DISABLE] SPI_RX_DMA_[ENABLE | DISABLE] SPI_TX_DMA_[ENABLE | DISABLE] |
Example Code for SYS_SPI_CONFIG |
// Configure the default SPI interface's operation and controller information: // - Master mode // - Use 8-bit words // - Select interrupts enabled // - Prescale the SPI interface clock by 32 SYS_SPI_CONFIG((SPI_MODE_QSPI | SPI_WORD_SIZE_8 | SPI_TX_START_INT_ENABLE | SPI_RX_INT_ENABLE | SPI_OVERRUN_INT_ENABLE | SPI_PRESCALE_32 | SPI_UNDERRUN_INT_ENABLE)); |
SYS_SPI_TRANSFERCONFIG
#define SYS_SPI_TRANSFERCONFIG Sys_SPI_TransferConfig(SPI, (config))
Location: spi.h:359
Parameters
Direction | Name | Description |
---|---|---|
in |
config |
Interface transfer configuration; use SPI_ENABLE, SPI_DISABLE, SPI_RESET, SPI_START, SPI_MODE_READ_WRITE, SPI_MODE_READ, SPI_MODE_WRITE, SPI_MODE_NOP, SPI_CS_0, SPI_CS_1, |
Example Code for SYS_SPI_TRANSFERCONFIG |
// Enable and configure default SPI interface to read operation mode SYS_SPI_TRANSFERCONFIG(SPI_ENABLE | SPI_MODE_READ); |
SYS_SPI_READ
#define SYS_SPI_READ Sys_SPI_Read(SPI)
Location: spi.h:369
Return
Assumptions
SPI is configured as master mode and transfer operation mode is SPI_MODE_READ_WRITE(full duplex) or (SPI_MODE_READ) half duplex
Example Code for SYS_SPI_READ |
// Generate clock and CS to read data from the default SPI interface SYS_SPI_READ(); |
SYS_SPI_WRITE
#define SYS_SPI_WRITE Sys_SPI_Write(SPI, (data))
Location: spi.h:379
Parameters
Direction | Name | Description |
---|---|---|
in |
data |
Data to be sent over SPI |
Assumptions
SPI is configured as master mode and transfer operation mode is SPI_MODE_READ_WRITE(full duplex) or (SPI_MODE_WRITE) half duplex
Example Code for SYS_SPI_WRITE |
// Generate clock and CS to write data to the default SPI interface SYS_SPI_WRITE(0xFF); |
SYS_SPI_GPIOCONFIG
#define SYS_SPI_GPIOCONFIG Sys_SPI_GPIOConfig(SPI, (slave), (cfg), (clk), (cs), (seri), (sero))
Location: spi.h:392
Parameters
Direction | Name | Description |
---|---|---|
in |
slave |
SPI master/slave configuration; use SPI*_SELECT_[MASTER | SLAVE] |
in |
cfg |
GPIO pin configuration for the SPI pads |
in |
clk |
GPIO to use as the SPI clock pad |
in |
cs |
GPIO to use as the SPI chip select pad |
in |
seri |
GPIO to use as the SPI serial input pad |
in |
sero |
GPIO to use as the SPI serial output pad |
Example Code for SYS_SPI_GPIOCONFIG |
// Configure GPIOs 0, 1, 2, and 3 for the default SPI interface with // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors SYS_SPI_GPIOCONFIG(GPIO0, (GPIO_LPF_DISABLE |GPIO_8X_DRIVE | |
SYS_DSPI_GPIOCONFIG
#define SYS_DSPI_GPIOCONFIG Sys_DSPI_GPIOConfig(SPI, (cfg), (clk), (cs), (io0), (io1))
Location: spi.h:404
Parameters
Direction | Name | Description |
---|---|---|
in |
cfg |
GPIO pin configuration for the SPI pads |
in |
clk |
GPIO to use as the DSPI clock pad |
in |
cs |
GPIO to use as the DSPI chip select pad |
in |
io0 |
GPIO to use as the DSPI io0 |
in |
io1 |
GPIO to use as the DSPI io1 |
Example Code for SYS_DSPI_GPIOCONFIG |
// Configure GPIOs 0, 1, 2, and 3 for the default DSPI interface with // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors SYS_DSPI_GPIOCONFIG((GPIO_LPF_DISABLE | GPIO_8X_DRIVE | |
SYS_QSPI_GPIOCONFIG
#define SYS_QSPI_GPIOCONFIG Sys_QSPI_GPIOConfig(SPI, (cfg), (clk), (cs), (io0), (io1), \ (io2), (io3))
Location: spi.h:418
Example Code for SYS_QSPI_GPIOCONFIG |
// Configure GPIOs 0, 1, 2, 3, 4, and 5 for the default QSPI interface with // low-pass filter disabled, 8X drive-strength, and 1 kOhm pull-up resistors SYS_QSPI_GPIOCONFIG((GPIO_LPF_DISABLE | GPIO_8X_DRIVE | GPIO_1K_PULL_UP), |