DMA_STATUS

Bit Field

Read/Write

Field Name

Description

10

R

ACTIVE

Active status of the channel

9

R

CNT_INT

Indicate if a counter interrupt has occurred on DMA channel

8

R

COMPLETE_INT

Indicate if a complete interrupt has occurred on DMA channel

6

W

CNT_INT_CLEAR

Clear the counter interrupt flag

5

W

COMPLETE_INT_CLEAR

Clear the complete interrupt flag

4

W

SRC_BUFFER_FILL_LVL_WR

Enable writing of SRC_BUFFER_FILL_LVL

3:0

RW

SRC_BUFFER_FILL_LVL

The number of nibbles currently in the source buffer (0: buffer is empty, 8: the 32-bit buffer is completely full)

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

10

ACTIVE

DMA_NON_ACTIVE

DMA channel is disabled or waiting for a trigger event.

0x0*

DMA_ACTIVE

DMA channel is running

0x1

9

CNT_INT

DMA_CNT_INT_FALSE

Indicate that no counter interrupt has occurred

0x0*

DMA_CNT_INT_TRUE

Indicate that a counter interrupt has occurred

0x1

8

COMPLETE_INT

DMA_COMPLETE_INT_FALSE

Indicate that a no complete interrupt has occurred

0x0*

DMA_COMPLETE_INT_TRUE

Indicate that a complete interrupt has occurred

0x1

6

CNT_INT_CLEAR

DMA_CNT_INT_CLEAR

Clear the counter interrupt flag

0x1

5

COMPLETE_INT_CLEAR

DMA_COMPLETE_INT_CLEAR

Clear the complete interrupt flag

0x1

4

SRC_BUFFER_FILL_LVL_WR

DMA_SRC_BUFFER_FILL_LVL_WR

Enable writing of SRC_BUFFER_FILL_LVL

0x1