SYSCTRL_MEM_ACCESS_CFG

Bit Field

Read/Write

Field Name

Description

29:24

RW

WAKEUP_ADDR_PACKED

Wakeup restore address in packed 6-bit format. When written, SYSCTRL_WAKEUP_ADDR is updated. This field reads back as zero when SYSCTRL_WAKEUP_ADDR does not point to an enabled RAM instance.

17:16

RW

BB_DRAM_ACCESS

Baseband DRAM[1:0] access configuration

15:8

RW

DRAM_ACCESS

DRAM[7:0] access configuration

1

RW

FLASH_ACCESS

FLASH[0:0] access configuration

0

RW

PROM_ACCESS

PROM access configuration

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

17:16

BB_DRAM_ACCESS

BB_DRAM0_ACCESS_DISABLE

Baseband DRAM0 access disabled

0x0*

BB_DRAM1_ACCESS_DISABLE

Baseband DRAM1 access disabled

0x0*

BB_DRAM0_ACCESS_ENABLE

Baseband DRAM0 access enabled

0x1

BB_DRAM1_ACCESS_ENABLE

Baseband DRAM1 access enabled

0x2

15:8

DRAM_ACCESS

DRAM0_ACCESS_DISABLE

DRAM0 access disabled

0x0

DRAM1_ACCESS_DISABLE

DRAM1 access disabled

0x0

DRAM2_ACCESS_DISABLE

DRAM2 access disabled

0x0

DRAM3_ACCESS_DISABLE

DRAM3 access disabled

0x0

DRAM4_ACCESS_DISABLE

DRAM4 access disabled

0x0

DRAM5_ACCESS_DISABLE

DRAM5 access disabled

0x0

DRAM6_ACCESS_DISABLE

DRAM6 access disabled

0x0

DRAM7_ACCESS_DISABLE

DRAM7 access disabled

0x0

DRAM0_ACCESS_ENABLE

DRAM0 access enabled

0x1*

DRAM1_ACCESS_ENABLE

DRAM1 access enabled

0x2

DRAM2_ACCESS_ENABLE

DRAM2 access enabled

0x4

DRAM3_ACCESS_ENABLE

DRAM3 access enabled

0x8

DRAM4_ACCESS_ENABLE

DRAM4 access enabled

0x10

DRAM5_ACCESS_ENABLE

DRAM5 access enabled

0x20

DRAM6_ACCESS_ENABLE

DRAM6 access enabled

0x40

DRAM7_ACCESS_ENABLE

DRAM7 access enabled

0x80

1

FLASH_ACCESS

FLASH0_ACCESS_DISABLE

FLASH0 access disabled

0x0*

FLASH0_ACCESS_ENABLE

FLASH0 access enabled

0x1

0

PROM_ACCESS

PROM_ACCESS_DISABLE

PROM access disabled

0x0

PROM_ACCESS_ENABLE

PROM access enabled

0x1*