RF_REG00

Bit Field

Read/Write

Field Name

Description

31

RW

DATAWHITE_BTLE_DW_BTLE

Data whitening control

30:24

RW

DATAWHITE_BTLE_DW_BTLE_RST

Reset value to put on the Bluetooth LE data whitening shift register

23

RW

FOURFSK_CODING_EN_FOURFSK_CODING

Enable 4FSK coding

22:20

RW

FOURFSK_CODING_TX_FOURFSK_CODING

Set the 4FSK coding (Tx mode)

18:16

RW

FOURFSK_CODING_RX_FOURFSK_CODING

Set the 4FSK decoding (Rx mode)

14

RW

MODE2_DIFF_CODING

Differential coding/decoding

13

RW

MODE2_PSK_NFSK

FSK/PSK mode selection

12:8

RW

MODE2_TESTMODE

Output test mode

7

RW

MODE_NOT_TO_IDLE

FSM goes in suspend mode after a Tx or Rx packet

5

RW

MODE_EN_FSM

Radio FSM control

4

RW

MODE_EN_DESERIALIZER

Deserializer control

3

RW

MODE_EN_SERIALIZER

Serializer control

2

RW

MODE_TX_NRX

Select Tx or Rx mode

1:0

RW

MODE_MODE

Select the working mode of the digital baseband

Bit Field

Field Name

Value Symbol

Value Description

Hex Value

31

DATAWHITE_BTLE_DW_BTLE

DATAWHITE_BTLE_DW_BTLE_DISABLE

Disable data whitening

0x0

DATAWHITE_BTLE_DW_BTLE_ENABLE

Enable data whitening

0x1*

30:24

DATAWHITE_BTLE_DW_BTLE_RST

DATAWHITE_BTLE_DW_BTLE_RST_DEFAULT

0x0*

23

FOURFSK_CODING_EN_FOURFSK_CODING

FOURFSK_CODING_EN_FOURFSK_CODING_DISABLE

Disable 4FSK coding

0x0*

FOURFSK_CODING_EN_FOURFSK_CODING_ENABLE

Enable 4FSK coding

0x1

22:20

FOURFSK_CODING_TX_FOURFSK_CODING

FOURFSK_CODING_TX_FOURFSK_CODING_DEFAULT

Bit 0 determines if the sign is given by the Q signal (0) or I signal (1). Bit 1 select if the signal is inverted for the sign, bit 2 selects if the signal is inverted for the abs amplitude.

0x0*

18:16

FOURFSK_CODING_RX_FOURFSK_CODING

FOURFSK_CODING_RX_FOURFSK_CODING_DEFAULT

Bit 0 determines if the sign is given by the Q signal (0) or I signal (1). Bit 1 selects if the signal is inverted for the sign, bit 2 selects if the signal is inverted for the abs amplitude.

0x0*

14

MODE2_DIFF_CODING

MODE2_DIFF_CODING_DISABLE

Disable the differential coding/decoding

0x0*

MODE2_DIFF_CODING_ENABLE

Enable the differential coding/decoding

0x1

13

MODE2_PSK_NFSK

MODE2_PSK_NFSK_FSK

FSK mode is selected

0x0*

MODE2_PSK_NFSK_PSK

PSK mode is selected

0x1

12:8

MODE2_TESTMODE

MODE2_TESTMODE_OFF

0x0*

MODE2_TESTMODE_CEVA

0x8

7

MODE_NOT_TO_IDLE

MODE_NOT_TO_IDLE_DISABLE

FSM not to go in suspend mode after a Tx or Rx packet

0x0*

MODE_NOT_TO_IDLE_ENABLE

FSM to go in suspend mode after a Tx or Rx packet

0x1

5

MODE_EN_FSM

MODE_EN_FSM_DISABLE

Disable the radio FSM

0x0

MODE_EN_FSM_ENABLE

Enable the radio FSM

0x1*

4

MODE_EN_DESERIALIZER

MODE_EN_DESERIALIZER_DISABLE

Disable the deserializer

0x0*

MODE_EN_DESERIALIZER_ENABLE

Enable the deserializer

0x1

3

MODE_EN_SERIALIZER

MODE_EN_SERIALIZER_DISABLE

Disable the serializer

0x0*

MODE_EN_SERIALIZER_ENABLE

Enable the serializer

0x1

2

MODE_TX_NRX

MODE_TX_NRX_RX

Select Rx mode

0x0*

MODE_TX_NRX_TX

Select Tx mode

0x1

1:0

MODE_MODE

MODE_MODE_0

The digital baseband is off

0x0

MODE_MODE_1

The clock is generated but the blocks are reset (Tx, Rx, FIFOs and FSM)

0x1

MODE_MODE_2

The digital baseband is frozen

0x2*

MODE_MODE_3

Working

0x3