RF_REG2A
Bit Field |
Read/Write |
Field Name |
Description |
---|---|---|---|
27:24 |
RW |
SD_MASH_MASK_MASH_MASK |
Mask the n LSB of the fractional part of the MASH (debug only) |
19 |
RW |
BIAS_EN_2_EN_PTAT |
Enable PTAT |
18:16 |
RW |
BIAS_EN_2_EN_BIAS_BB_HI |
Bias enable for BB (same order as biases) |
15:12 |
RW |
BIAS_EN_1_EN_BIAS_BB_LO |
Bias enable for BB (same order as biases) |
11:7 |
RW |
BIAS_EN_1_EN_BIAS_PLL |
Bias enable for PLL (same order as biases) |
6:0 |
RW |
BIAS_EN_1_EN_BIAS_RXTX |
Bias enable for RxTx (same order as biases) |
Bit Field |
Field Name |
Value Symbol |
Value Description |
Hex Value |
---|---|---|---|---|
27:24 |
SD_MASH_MASK_MASH_MASK |
SD_MASH_MASK_MASH_MASK_DEFAULT |
|
0x0* |
19 |
BIAS_EN_2_EN_PTAT |
BIAS_EN_2_EN_PTAT_DISABLE |
Disable PTAT |
0x0 |
|
|
BIAS_EN_2_EN_PTAT_ENABLE |
Enable PTAT |
0x1* |
18:16 |
BIAS_EN_2_EN_BIAS_BB_HI |
BIAS_EN_2_EN_BIAS_BB_HI_DEFAULT |
|
0x0* |
15:12 |
BIAS_EN_1_EN_BIAS_BB_LO |
BIAS_EN_1_EN_BIAS_BB_LO_DEFAULT |
|
0x0* |
11:7 |
BIAS_EN_1_EN_BIAS_PLL |
BIAS_EN_1_EN_BIAS_PLL_DEFAULT |
|
0x0* |
6:0 |
BIAS_EN_1_EN_BIAS_RXTX |
BIAS_EN_1_EN_BIAS_RXTX_DEFAULT |
|
0x0* |